Field Effect Transistor Amplifiers - MCQs

Multiple Choice Questions Topic Outline

• MCQs in FET Amplifiers
• MCQs in FET Small-Signal Model
• MCQs in JFET Fixed-Bias Configuration
• MCQs in JFET Self-Bias Configuration
• MCQs in JFET Voltage-Divider Configuration
• MCQs in JFET Source-Follower (Common-Drain) Configuration
• MCQs in JFET Common-Gate Configuration
• MCQs in Depletion-type MOSFETs
• MCQs in Enhancement-type MOSFETs
• MCQs in E-MOSFET Drain-Feedback Configuration
• MCQs in E-MOSFET Voltage-Divider Configuration
• MCQs in Designing FET Amplifier Networks

Begin and Good luck!

1. FET amplifiers provide ________.

• A) excellent voltage gain
• B) high input impedance
• C) low power consumption
• D) All of the above

2. A BJT is a ________-controlled device.

• A) current
• B) voltage
• C) power
• D) resistance

3. An FET is a ________-controlled device.

• A) current
• B) voltage
• C) power
• D) resistance

4. The E-MOSFET is quite popular in ________ applications.

• A) digital circuitry
• B) high-frequency
• C) buffering
• D) All of the above

5. What is the range of g_m for JFETs?

• A) 1 µS to 10 µS
• B) 100 µS to 1000 µS
• C) 1000 µS to 5000 µS
• D) 10000 µS to 100000 µS

6. For what value of I_D is g_m equal to 0.5 g_m0?

• A) 0 mA
• B) 0.25 I_DSS
• C) 0.5 I_DSS
• D) I_DSS

7. What is the typical value for the input impedance Z_i for JFETs?

• A) 100 kΩ
• B) 1 MΩ
• C) 10 MΩ
• D) 1000 MΩ

8. Referring to the transfer characteristics shown below, calculate g_m at V_GSQ = –1 V.

• A) 2 mS
• B) 3 mS
• C) 4 mS
• D) 5 mS

9. Use the following equation to calculate gm for a JFET having I_DSS = 10 mA, V_P = –5 V, and V_GSQ = –2.5 V.

• A) 2 mS
• B) 3 mS
• C) 4 mS
• D) 5 mS

10. Referring to the following figure, calculate g_m for V_GSQ = –1.25 V.

• A) 2 mS
• B) 2.5 mS
• C) 2.75 mS
• D) 3.25 mS

11. Referring to this figure, obtain g_m for I_D = 6 mA.

• A) 2.83 mS
• B) 3.00 mS
• C) 3.25 mS
• D) 3.46 mS

12. Referring to the figure below, determine the output impedance for V_GS = –3 V at V_DS = 5 V.

• A) 100 kΩ
• B) 80 kΩ
• C) 25 kΩ
• D) 5 kΩ

13. Calculate g_m and r_d if y_fs = 4 mS and y_os = 15 ΩS.

• A) 4 mS, 66.7 kΩ
• B) 4 mS, 15 kΩ
• C) 66.7 kΩ, 4 mS
• D) None of the above

14. The steeper the slope of the I_D versus V_GS curve, the ________ the level of g_m.

• A) less
• B) same
• C) greater

15. When V_GS = 0.5 V_p g_m is ________ the maximum value.

• A) one-fourth
• B) one-half
• C) three-fourths
• D) two-thirds

16. If I_D = I_DSS / 2, g_m = ___________ g_mo.

• A) 1
• B) 0.707
• C) 0.5
• D) 1.414

17. The more horizontal the characteristic curves on the drain characteristics, the ________ the output impedance.

• A) less
• B) same
• C) greater

18. What is (are) the function(s) of the coupling capacitors C₁ and C₂ in an FET circuit?

• A) to create an open circuit for dc analysis
• B) to isolate the dc biasing arrangement from the applied signal and load
• C) to create a short-circuit equivalent for ac analysis
• D) All of the above

19. Where do you get the level of g_m and r_d for an FET transistor?

• A) from the dc biasing arrangement
• B) from the specification sheet
• C) from the characteristics
• D) All of the above

20. Referring to this figure, find Z_o if y_os = 20 µS.

• A) 1.85 kΩ
• B) 1.92 kΩ
• C) 2.05 kΩ
• D) 2.15 kΩ

21. Referring to this figure, calculate A_v if y_os = 20 µS.

• A) –3.48
• B) –3.56
• C) –3.62
• D) –4.02

22. For the fixed-bias configuration, if r_d < 10 • R_D, then Z_o = ________.

• A) R_D
• B) R_D || r_d
• C) RG
• D) -gm • (R_D || r_d)

23. Which of the following is a required condition to simplify the equations for Z_o and A_v for the self-bias configuration?

• A) r_d ≤ 10R_D
• B) r_d = R_D
• C) r_d ≥ 10R_D
• D) None of the above

24. Referring to this figure, calculate Z_o if y_os = 40 µS.

• A) 2.92 kΩ
• B) 3.20 kΩ
• C) 3.25 kΩ
• D) 3.75 kΩ

25. On which of the following parameters does r_d have no or little impact in a source-follower configuration?

• A) Zi
• B) Zo
• C) Av
• D) All of the above

26. Referring to this figure, calculate Z_o for V_GSQ = –3.2 V.

• A) 362.52 Ω
• B) 340.5 Ω
• C) 420.5 Ω
• D) 480.9 Ω

27. Referring to this figure, calculate Z_i for y_os = 20 µS. Assume V_GSQ = −2.2V.

• A) 300.2 Ω
• B) 330.4 Ω
• C) 340.5 Ω
• D) 350.0 Ω

28. Which of the following is (are) related to depletion-type MOSFETs?

• A) V_GSQ can be negative, zero, or positive.
• B) g_m can be greater or smaller than g_m0’.
• C) I_D can be larger than I_DSS’.
• D) All of the above

29. Referring to this figure, calculate A_v for y_os = 58 µS.

• A) –7.29
• B) –7.50
• C) –8.05
• D) –8.55

30. Referring to this figure, calculate Z_i if r_d = 19 kΩ.

• A) 2.42 MΩ
• B) 2.50 MΩ
• C) 2.53 MΩ
• C) 2.59 MΩ

31. Referring to this figure, calculate Z_o if r_d = 19 kΩ.

• A) 1.75 kΩ
• B) 1.81 kΩ
• C) 1.92 kΩ
• D) 2.00 kΩ

32. Referring to this figure, calculate A_v if r_d = 19 kΩ.

• A) –2.85
• B) –3.26
• C) –2.95
• D) –3.21

33. Determine the value for R_D if the ac gain is 8.

• A) 1.51 kΩ
• B) 1.65 kΩ
• C) 1.85 kΩ
• D) 2.08 kΩ

34. Referring to this figure, calculate the value of R_D if the ac gain is 10. Assume V_GSQ = ¼V_p.

• A) 2.2 kΩ
• B) 2.42 kΩ
• C) 2.62 kΩ
• D) 2.82 kΩ

35. For an FET small-signal amplifier, one could go about troubleshooting a circuit by ________.

• A) viewing the circuit board for poor solder joints
• B) using a dc meter
• C) applying a test ac signal
• D) All of the above

Fill-in-the-blanks Questions

1. A field-effect transistor amplifier provides excellent voltage gain with the added feature of a _____ input impedance.

• A) low
• B) medium
• C) high
• D) None of the above

2. The depletion MOSFET circuit has a _____ input impedance than a similar JFET configuration.

• A) much higher
• B) much lower
• C) lower
• D) higher

3. The _____ is quite popular in digital circuits, especially in CMOS circuits that require very low power consumption.

• A) JFET
• B) BJT
• C) D-type MOSFET
• D) E-type MOSFET

4. _____ is the amplification factor in FET transistor amplifiers.

• A) Z_i
• B) g_m
• C) I_D
• D) I_G

5. _____ is an undefined quantity in a JFET.

• A) A_i
• B) A_v
• C) Z_i
• D) Z_o

6. The _____ controls the _____ of an FET.

• A) I_D’, V_GS
• B) V_GS’, I_D
• C) I_G’, V_DS
• D) I_G’, I_D

7. Transconductance is the ratio of changes in _____.

• A) I_D to V_GS
• B) I_D to V_DS
• C) V_GS to I_G
• D) V_GS to V_DS

8. The transconductance g_m _____ as the Q-point moves from V_p to I_DSS

• A) decreases
• B) remains the same
• C) increases
• D) None of the above

9. g_m has its maximum value for a JFET at _____.

• A) V_p
• B) 0.5 V_p
• C) 0.3 V_p
• D) I_DSS

10. The value of gm is at its maximum g_m0 at VG_S equal to _____ and zero at V_GS equal to _____.

• A) 0 V, V_p
• B) V_p, 0 V
• C) 0.5V_p, 0.3V_p
• D) 0.3V_p , 0.5V_p

11. The range of input impedance Z_i for MOSFETs is _____.

• A) 1 kΩ –10 kΩ
• B) 100 kΩ –1 MΩ
• C) 10 MΩ –100 MΩ
• D) 10¹² Ω to 10¹⁵ Ω

12. The range of output admittance y_os for FETs is _____.

• A) 5 µS –10 µS
• B) 10 µS –50 µS
• C) 50 µS –100 µS
• D) 200 µS –500 µS

13. The _____ configuration has the distinct disadvantage of requiring two dc voltage sources.

• A) self-bias
• B) voltage-divider
• C) fixed-bias
• D) All of the above

14. _____ is the network-input impedance for a JFET fixed-bias configuration.

• A) R_G
• B) R_D
• C) Zero
• D) None of the above

15. _____ is a required step in order to calculate Z_o.

• A) Setting I_G equal to zero
• B) Setting V_i equal to zero
• C) Setting I_D equal to I_DSS
• D) None of the above

16. _____ configuration(s) has (have) Z_o ≈ R_D.

• A) Fixed-bias
• B) Self-bias
• C) Voltage-divider
• D) All of the above

17. _____ is the only parameter that is different between voltage-divider and fixed-bias configurations.

• A) Z_i
• B) A_v
• C) Z_o
• D) None of the above

18. The input and output signals are in phase in a _____ configuration.

• A) fixed-bias
• B) source-follower
• C) voltage-divider
• D) self-bias

19. A _____ configuration has a voltage gain less than 1.

• A) fixed-bias
• B) self-bias
• C) source-follower
• D) voltage-divider

20. The input and output signals are 180º out of phase in a _____ configuration.

• A) source-follower
• B) common-gate
• C) common-drain
• D) voltage-divider

21. The isolation between input and output circuits in the ac equivalent circuit is lost in a _____ configuration.

• A) common-gate
• B) common-source
• C) common-drain
• D) None of the above

22. The _____ configuration has an input impedance, which is other than R_G.

• A) common-source
• B) common-gate
• C) common-drain
• D) None of the above

23. The gate-to-source voltage V_GS of a(n) _____ must be larger than the threshold V_GS(Th) for the transistor to conduct.

• A) JFET
• B) D-type MOSFET
• C) E-type MOSFET
• D) None of the above

24. r_d changes from one operation region to another with _____ values typically occurring at _____ levels of V_GS (closer to zero).

• A) lower, lower
• B) lower, higher
• C) higher, lower
• D) None of the above

25. The _____ does not support Shockley's equation.

• A) JFET
• B) D-type MOSFET
• C) E-type MOSFET
• D) None of the above

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• Electronic Devices and Circuit Theory (Chapter Quiz)

Note: Check your works. Field Effect Transistor Amplifiers - MCQs Answers

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DC Biasing – FETs - MCQs

Multiple Choice Questions Topic Outline

• MCQs in DC Biasing - Field Effect Transistor
• MCQs in Fixed-Bias Configuration
• MCQs in Self-Bias Configuration
• MCQs in Voltage-Divider Biasing
• MCQs in Depletion-Type MOSFETs
• MCQs in Enhancement-Type MOSFETs
• MCQs in Summary Table
• MCQs in Combination Networks
• MCQs in Design
• MCQs in P-Channel FETs
• MCQs in Universal JFET Bias Curve

Begin and Good luck!

1. What is the approximate current level in the gate of an FET in dc analysis?

• A) 0 A
• B) 0.7 mA
• C) 0.3 mA
• D) Undefined

2. Which of the following current equations is true?

• A) I_G = I_D
• B) I_G = I_S
• C) I_D = I_S
• D) I_G = I_D = I_S

3. For the FET, the relationship between the input and output quantities is _____ due to the _____ term in Shockley's equation.

• A) nonlinear, cubed
• B) linear, proportional
• C) nonlinear, squared

4. The input controlling variable for a(n) _____ is a current level and a voltage level for a(n) _____.

• A) BJT, FET
• B) FET, BJT
• C) FET, FET
• D) BJT, BJT

5. Calculate the value of V_DS.

• A) 0 V
• B) 8 V
• C) 4.75 V
• D) 16 V

6. The self-bias configuration eliminates the need for two dc supplies.

• A) True
• B) False

7. Which of the following is (are) true of a self-bias configuration compared to a fixed-bias configuration?

• A) One of the dc supplies is eliminated.
• B) A resistor R_S is added.
• C) V_GS is a function of the output current I_D.
• D) All of the above

8. Which of the following represents the voltage level of V_GS in a self-bias configuration?

• A) V_G
• B) V_GS(off)
• C) V_S
• D) V_P

9. What is the new value of R_D when there is 7 V across V_DS?

• A) 3 kΩ
• B) 3.3 kΩ
• C) 4 kΩ
• D) 5 kΩ

10. Which of the following is a false statement regarding the dc load line when comparing self-bias and voltage-divider configurations?

• A) Both are linear lines.
• B) Both cross the origin.
• C) Both intersect the transfer characteristics.
• D) Both are obtained by writing Kirchhoff's voltage law (KVL) at the input side loop.

11. For what value of R_D is the voltage across V_DS zero?

• A) 2.400 kΩ
• B) 5.167 kΩ
• C) 6.167 kΩ
• D) 6.670 kΩ

12. Calculate the value of V_DS’.

• A) 0 V
• B) 0.35 V
• C) 3.8 V
• D) 33.5 V

13. Which of the following describe(s) the difference(s) between JFETs and depletion-type MOSFETs?

• A) V_GS can be positive or negative for the depletion-type.
• B) I_D can exceed I_DSS for the depletion-type.
• C) The depletion-type can operate in the enhancement mode.
• D) All of the above

14. At what value of R_S does the circuit switch from depletion mode to enhancement mode?

• A) 250 Ω
• B) 500 Ω
• C) 10 MΩ
• D) None of the above

15. For what value of R₂ is V_GSQ equal to 1 V?

• A) 10 MΩ`
• B) 100 MΩ
• C) 110 MΩ
• D) 220 MΩ

16. Depletion-type MOSFETs do not permit operating points with positive values of V_GS and levels of I_D that exceed I_DSS.

• A) True
• B) False

17. For what value of R_S can the depletion-type MOSFETs operate in enhancement mode?

• A) 2.4 kΩ
• B) 5 kΩ
• C) 6.2 kΩ
• D) None of the above

18. Determine the value of V_DSQ.

• A) 3.5 V
• B) 4.86 V
• C) 7.14 V
• D) 10 V

19. Calculate the value of V_DSQ.

• A) 0 V
• B) 20 V
• C) 30 V
• D) 40 V

20. What are the voltages across R_D and R_S?

• A) 0 V, 0 V
• B) 5 V, 5 V
• C) 10 V, 10 V
• D) 20 V, 20 V

21. Calculate V_D.

• A) 23.0 V
• B) 17.0 V
• C) 4.6 V
• D) 12.4 V

22. Specification sheets typically provide the value of the constant k for enhancement-type MOSFETs.

• A) True
• B) False

23. Calculate V_DS'.

• A) 0 V
• B) 6 V
• C) 16 V
• D) 11 V

24. Calculate V_CE’.

• A) 0 V
• B) 2 V
• C) 3 V
• D) 5.34 V

25. Given the values of V_DQ and I_DQ for this circuit, determine the required values of R_D and R_S.

• A) 2 kΩ, 2 kΩ
• B) 1 kΩ, 5.3 kΩ
• C) 3.2 kΩ, 400 Ω
• D) 2.5 kΩ, 5.3 kΩ

26. Calculate the value of R_S. Assume V_GSQ = −2V.

• A) 0 kΩ
• B) 1.68 kΩ
• C) 6.81 kΩ`
• D) 8.5 kΩ

27. Calculate the value of R_D’.

• A) 2 kΩ
• B) 3 kΩ
• C) 3.5 kΩ
• D) 4.13 kΩ

28. In the design of linear amplifiers, it is good design practice to choose operating points that do not crowd the saturation level or cutoff regions.

• A) True
• B) False

29. Seldom are current levels measured since such maneuvers require disturbing the network structure to insert the meter.

• A) True
• B) False

30. Calculate the value of V_DS.

• A) –3 V
• B) 3 V
• C) –4 V
• D) 4 V

31. Determine the quiescent values of I_D and V_GS.

• A) 1.2 mA, –1.8 V
• B) 1.5 mA, –1.5 V
• C) 2.0 mA, –1.2 V
• D) 3.0 mA, –0.8 V

32. Calculate V_DSQ.

• A) 1.0 V
• B) 1.50 V
• C) 2.56 V
• D) 3.58 V

33. On the universal JFET bias curve, the vertical scale labelled _____ can, in itself, be used to find the solution to _____ configurations.

• A) m, fixed-bias
• B) M, fixed-bias
• C) M, voltage-bias
• D) m, voltage-bias

34. Through proper design, a ______ can be introduced that will affect the biasing level of a voltage-controlled JFET resistor.

• A) photodiode
• B) thermistor
• C) laser diode
• D) Zener diode

35. For the noninverting amplifier, one of the most important advantages associated with using a JFET for control is the fact that it is _____ rather than _____ control.

• A) dc, ac
• B) ac, dc

Fill-in-the-blanks Questions

1. For the field-effect transistor, the relationship between the input and the output quantities is _____.

• A) linear
• B) nonlinear
• C) 3rd degree
• D) None of the above

2. The input controlling variable for an FET transistor is a _____ level.

• A) resistor
• B) current
• C) voltage
• D) All of the above

3. The controlled variable on the output side of an FET transistor is a _____ level.

• A) current
• B) voltage
• C) resistor
• D) None of the above

4. For _____, Shockley's equation is applied to relate the input and the output quantities.

• A) JFETs
• B) depletion-type MOSFETs
• C) enhancement-type MOSFETs
• D) JFETs and depletion-type MOSFETs

5. The coupling capacitors are _____ for the dc analysis and _____________ for the ac analysis.

• A) open-circuit, low impedance
• B) short-circuit, low impedance
• C) open-circuit, high impedance
• D) None of the above

6. In a fixed-bias configuration, the voltage level of VGS is equal to _____.

• A) V_S
• B) V_G
• C) V_GS(off)
• D) V_P

7. The ratio of current I_D to I_DSS is equal to _____ for a fixed-bias configuration.

• A) 0
• B) 0.25
• C) 0.5
• D) 1

8. When plotting the transfer characteristics, choosing V_GS = 0.5V_P will result in a drain current level of _____ I_DSS.

• A) 0
• B) 0.25
• C) 0.5
• D) 1

9. The dc load line is drawn using the equation obtained by applying Kirchhoff's voltage law (KVL) at _____ side loop(s) of the circuit.

• A) the output
• B) the input
• C) both the input and output
• D) None of the above

10. The slope of the dc load line in a self-bias configuration is controlled by _____.

• A) V_DD
• B) R_D
• C) R_G
• D) R_S

11. _____ levels of RS result in _____ quiescent values of I_D and _____ negative values of V_GS.

• A) Increased, lower, less
• B) Increased, higher, less
• C) Increased, higher, more
• D) Increased, less, lower

12. The slope of the dc load line in a voltage-divider is controlled by _____.

• A) R₁
• B) R₂
• C) R_S
• D) All of the above

13. In a depletion-type MOSFET, the transfer characteristic rises _____ as V_GS becomes more positive.

• A) less rapidly
• B) more rapidly
• C) the same
• D) None of the above

14. In _____ configuration(s) a depletion-type MOSFET can operate in enhancement mode.

• A) self-bias
• B) fixed-bias with no V_GG
• C) voltage-divider
• D) None of the above

15. In an enhancement-type MOSFET, the drain current is zero for levels of V_GS less than the _____ level.

• A) V_GS(Th)
• B) V_GS(off)
• C) V_P
• D) V_DD

16. Specification sheets typically provide _____ for enhancement-type MOSFETs.

• A) the threshold voltage V_GS(Th)
• B) a level of drain current I_D(on)
• C) an I_D(on)
• D) All of the above

17. In a feedback-bias configuration, the slope of the dc load line is controlled by _____.

• A) R_G
• B) R_D
• C) V_DG
• D) None of the above

18. For R₂ smaller than _____ kΩ the voltage V_D is equal to V_DD = 16 V.

• A) 3.75
• B) 5
• C) 12.0
• D) 24

19. _____ must be considered in the total design process.

• A) Dc conditions
• B) Level of amplification
• C) Signal strength
• D) All of the above

20. In a JFET, the level of _____ is limited to values between 0 V and –VP.

• A) V_SQ
• B) V_DGQ
• C) V_DSQ
• D) V_GSQ

21. The level of V_DS is typically between _____ % and _____ % of V_DD.

• A) 0, 100
• B) 10, 90
• C) 25, 75
• D) None of the above

22. In a universal JFET bias curve, the vertical scale labeled m is used to find the solution to the _____ configuration.

• A) fixed-bias
• B) self-bias
• C) voltage-divider
• D) None of the above

23. In a universal JFET bias curve, the vertical scale labeled M is used for finding the solution to the _____ configuration.

• A) fixed-bias
• B) self-bias
• C) voltage-divider
• D) None of the above

24. In a universal JFET bias curve, the horizontal axis is _____.

• A) V_DS
• B) ID / I_DSS
• C) the normalized level
• D) V_GS

25. In p-channel FETs, the level of V_GS is _____ while the level of VDS is _____.

• A) negative, negative
• B) positive, positive
• C) negative, positive
• D) positive, negative

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• Electronic Devices and Circuit Theory (Chapter Quiz)

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Field Effect Transistor Devices - MCQs

Multiple Choice Questions Topic Outline

• MCQs in FET Devices
• MCQs in Construction and Characteristics of JFETs
• MCQs in Transfer Characteristics
• MCQs in Specification Sheets (JFETs)
• MCQs in Instrumentation
• MCQs in Important Relationships
• MCQs in Depletion-Type MOSFET
• MCQs in Enhancement-Type MOSFET
• MCQs in MOSFET Handling
• MCQs in VMOS
• MCQs in CMOS

Begin and Good luck!

1. Which of the following controls the level of I_D?

• A) V_GS
• B) V_DS
• C) I_G
• D) V_DG

2. Which of the following is (are) not an FET?

• A) n-channel
• B) p-channel
• C) p-n channel
• D) n-channel and p-channel

3. What is the range of an FET's input impedance?

• A) 10 Ω to 1 kΩ
• B) 1 kΩ to 10 kΩ
• C) 50 kΩ to 100 kΩ
• D) 1 MΩ to several hundred MΩ

4. Which of the following transistor(s) has (have) depletion and enhancement types?

• A) BJT
• B) JFET
• C) MOSFET
• D) None of the above

5. A BJT is a _____-controlled device. The JFET is a _____ - controlled device.

• A) voltage, voltage
• B) voltage, current
• C) current, voltage
• D) current, current

6. The BJT is a _____ device. The FET is a _____ device.

• A) bipolar, bipolar
• B) bipolar, unipolar
• C) unipolar, bipolar
• D) unipolar, unipolar

7. Which of the following is (are) the terminal(s) of a field-effect transistor (FET).

• A) Drain
• B) Gate
• C) Source
• D) All of the above

8. What is the level of I_G in an FET?

• A) Zero amperes
• B) Equal to I_D
• C) Depends on V_DS
• D) Undefined

9. At which of the following is the level of V_DS equal to the pinch-off voltage?

• A) When I_D becomes equal to I_DSS
• B) When V_GS is zero volts
• C) I_G is zero
• D) All of the above

10. At which of the following condition(s) is the depletion region uniform?

• A) No bias
• B) V_DS > 0 V
• C) V_DS = V_P
• D) None of the above

11. Refer to the following characteristic curve. Calculate the resistance of the FET at V_GS = –0.25 V if r_o = 10 kΩ.

• A) 1.1378 kΩ
• B) 113.78 Ω
• C) 11.378 Ω
• D) 11.378 kΩ

^{12. What is the level of drain current ID for gate-to-source voltages VGS less than (more negative than) the pinch-off level?}

• A) zero amperes
• B) I_DSS
• C) Negative value
• D) Undefined

13. The three terminals of the JFET are the _____, _____, and _____.

• A) gate, collector, emitter
• B) base, collector, emitter
• C) gate, drain, source
• D) gate, drain, emitter

14. The level of V_GS that results in I_D = 0 mA is defined by V_GS = _____.

• A) V_GS(off)
• B) V_P
• C) V_DS
• D) None of the above

15. The region to the left of the pinch-off locus is referred to as the _____ region.

• A) saturation
• B) cutoff
• C) ohmic
• D) All of the above

16. Which of the following represent(s) the cutoff region for an FET?

• A) I_D = 0 mA
• B) V_GS = VP
• C) I_G = 0
• D) All of the above

17. Referring to this transfer curve. Calculate (using Shockley's equation) V_GS at I_D = 4mA.

• A) 2.54 V
• B) –2.54 V
• C) –12 V
• D) Undefined

18. Referring to this transfer curve, determine I_D at V_GS = 2 V.

• A) 0.444 mA
• B) 1.333 mA
• C) 0.111 mA
• D) 4.444 mA

19. What is the ratio of I_D / I_DSS for V_GS = 0.5 V_P?

• A) 0.25
• B) 0.5
• C) 1
• D) 0

20. The drain current will always be one-fourth of I_DSS as long as the gate-to-source voltage is _____ the pinch-off value.

• A) one-fourth
• B) one-half
• C) three-fourths
• D) None of the above

21. Which of the following ratings appear(s) in the specification sheet for an FET?

• A) Voltages between specific terminals
• B) Current levels
• C) Power dissipation
• D) All of the above

22. Refer to this portion of a specification sheet. Determine the values of reverse-gate-source voltage and gate current if the FET was forced to accept it.

• A) 25 Vdc, –200 nAdc
• B) –25 Vdc, 10 mAdc
• C) –6 Vdc, –1.0 nAdc
• D) None of the above

23. Hand-held instruments are available to measure _____ for the BJT.

• A) β_dc
• B) I_DSS
• C) V_P
• D) All of the above

24. How many terminals can a MOSFET have?

• A) 2
• B) 3
• C) 4
• D) 3 or 4

25. Which of the following applies to MOSFETs?

• A) No direct electrical connection between the gate terminal and the channel
• B) Desirable high input impedance
• C) Uses metal for the gate, drain, and source connections
• D) All of the above

26. Referring to the following transfer curve, determine the level of V_GS when the drain current is 20 mA.

• A) 1.66 V
• B) –1.66 V
• C) 0.66 V
• D) –0.66 V

27. Refer to the following curves. Calculate I_D at V_GS = 1 V.

• A) 8.167 mA
• B) 4.167 mA
• C) 6.167 mA
• D) 0.616 mA

28. It is the insulating layer of _____ in the MOSFET construction that accounts for the very desirable high input impedance of the device.

• A) SiO
• B) GaAs
• C) SiO₂
• D) HCl

29. Refer to the following figure. Calculate V_GS at I_D = 8 mA for k = 0.278 × 10^–2 A/V².

• A) 3.70 V
• B) 5.36 V
• C) 7.36 V
• D) 2.36 V

30. The transfer curve is not defined by Shockley's equation for the _____.

• A) JFET
• B) depletion-type MOSFET
• C) enhancement-type MOSFET
• D) BJT

31. Which of the following applies to a safe MOSFET handling?

• A) Always pick up the transistor by the casing.
• B) Power should always be off when network changes are made.
• C) Always touch ground before handling the device.
• D) All of the above

32. What is the purpose of adding two Zener diodes to the MOSFET in this figure?

• A) To reduce the input impedance
• B) To protect the MOSFET for both polarities
• C) To increase the input impedance
• D) None of the above

33. Which of the following is (are) the advantage(s) of VMOS over MOSFETs?

• A) Reduced channel resistance
• B) Higher current and power ratings
• C) Faster switching time
• D) All of the above

34. Which of the following FETs has the lowest input impedance?

• A) JFET
• B) MOSFET depletion-type
• C) MOSFET enhancement-type
• D) None of the above

35. Which of the following input impedances is not valid for a JFET?

• A) 10¹⁰ Ω
• B) 10⁹ Ω
• C) 10⁸ Ω
• D) 10¹¹ Ω

Fill-in-the-blanks Questions

1. A junction field-effect transistor (JFET) is a _____ device.

• A) current-controlled
• B) voltage-controlled
• C) voltage-current controlled
• D) None of the above

2. The FET is a _____ device depending solely on either electron (n-channel) or hole (p-channel) conduction.

• A) unipolar
• B) bipolar
• C) tripolar
• D) None of the above

3. One of the most important characteristics of the FET is its _____ impedance.

• A) low input
• B) medium input
• C) high input
• D) None of the above

4. The _____ transistor has become one of the most important devices used in the design and construction of integrated circuits for digital computers.

• A) MOSFET
• B) BJT
• C) JFET
• D) None of the above

5. In the n-channel transistor, the drain and source are connected to the _____ channel while the gate is connected to the two layers of _____ material.

• A) p-type, n-type
• B) p-type, p-type
• C) n-type, p-type
• D) n-type, n-type

6. In an FET transistor, the depletion region is _____ near the top of both p-type materials.

• A) wider
• B) narrower
• C) the same as the rest of the depletion region
• D) None of the above

7. The pinch-off voltage continues to drop in a _____ manner as V_GS becomes more and more negative.

• A) linear
• B) parabolic
• C) cubic
• D) None of the above

8. The region to the right of the pinch-off locus is commonly referred to as the _____ region.

• A) constant-current
• B) saturation
• C) linear amplification
• D) All of the above

9. As V_GS becomes _____ negative, the slope of each curve in the characteristics becomes _____ horizontal corresponding with an increasing resistance level.

• A) less, more
• B) more, less
• C) more, more
• D) None of the above

10. The transfer curve can be obtained by _____.

• A) using Shockley's equation
• B) using both Shockley's equation and by output characteristics
• C) characteristics
• D) None of the above

11. The active region of an FET is bounded by _____.

• A) ohmic region
• B) cutoff region
• C) power line
• D) All of the above

12. A(n) _____ can be used to check the condition of an FET.

• A) digital display meter (DDM)
• B) ohmmeter (VOM)
• C) curve tracer
• D) All of the above

13. In a curve tracer, the _____ reveals the distance between the V_GS curves for the n-channel device.

• A) vertical sens.
• B) horizontal sens.
• C) Per step
• D) gm

14. In an FET circuit, _____ is normally the parameter to be determined first.

• A) V_GS
• B) V_DS
• C) V_DG
• D) I_D

15. The primary difference between the construction of a MOSFET and an FET is the _____.

• A) construction of the gate connection
• B) low input impedance
• C) threshold voltage
• D) None of the above

16. The primary difference between the construction of depletion-type and enhancement-type MOSFETs is _____.

• A) the size of the transistor
• B) the absence of the channel
• C) the reverse bias junction
• D) All of the above

17. The level of _____ that results in the significant increase in drain current in enhancement-type MOSFETs is called threshold voltage V_T’.

• A) V_DD
• B) V_DS
• C) V_GS
• D) V_DG

18. In an n-channel enhancement-type MOSFET with a fixed value of V_T’, the _____ the level of V_GS’, the _____ the saturation level for V_DS’.

• A) higher, more
• B) higher, less
• C) lower, lower
• D) None of the above

19. The enhancement-type MOSFET is in the cutoff region if _____.

• A) applied V_GS is larger than V_GS(Th)
• B) applied V_GS is less than or equal to V_GS(Th)
• C) V_GS has a positive level
• D) None of the above

20. The specification sheet provides _____ to calculate the value of k for enhancement-type MOSFETs.

• A) V_GS(on)
• B) I_D(on)
• C) V_GS(Th)
• D) All of the above

21. _____ has high input impedance, fast switching speeds, and lower operating power levels.

• A) CMOS
• B) FET
• C) BJT
• D) None of the above

22. The FET resistance in the ohmic region is _____ at V_P and _____ at the origin.

• A) smallest, largest
• B) largest, smallest
• C) larger, smaller
• D) smaller, larger

23. The silicon dioxide (SiO₂) layer used in a MOSFET is _____.

• A) an insulator
• B) a conductor
• C) a semiconductor
• D) None of the above

24. In an n-channel depletion-type MOSFET the region of positive gate voltages on the drain or transfer characteristics is referred to as the _____ region with the region between cutoff and the saturation level of I_D referred to as the _____ region.

• A) depletion, enhancement
• B) enhancement, enhancement
• C) enhancement, depletion
• D) None of the above

25. VMOS FETs have a _____ temperature coefficient that will combat the possibility of thermal runaway.

• A) positive
• B) negative
• C) zero
• D) None of the above

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• Electronic Devices and Circuit Theory (Chapter Quiz)

Note: Check your works. Field Effect Transistor Devices - MCQs Answers

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Bipolar Junction Transistor Amplifiers - MCQs

Multiple Choice Questions Topic Outline

• MCQs in BJT Amplifiers
• MCQs in Amplifier Operation
• MCQs in Transistor AC Models
• MCQs in The Common-Emitter Amplifier
• MCQs in The Common-Collector Amplifier
• MCQs in The Common-Base Amplifier
• MCQs in Multistage Amplifiers
• MCQs in The Differential Amplifier
• MCQs in Common mode
• MCQs in CMRR (Common-mode rejection ratio)
• MCQs in Emitter-follower
• MCQs in AC Quantities

Begin and Good luck!

1. Which of the following techniques can be used in the sinusoidal ac analysis of transistor networks?

• A) Small-signal
• B) Large-signal
• C) Small- or large-signal
• D) None of the above

2. What is the limit of the efficiency defined by = P_o / P_i?

• A) Greater than 1
• B) Less than 1
• C) Always 1
• D) None of the above

3. Which of the following define(s) the conversion efficiency?

• A) Ac power to the load/ac input power
• B) Ac power to the load/dc power supplied
• C) Dc output power/ac input power
• D) All of the above

4. Which of the following should be done to obtain the ac equivalent of a network?

• A) Set all dc sources to zero
• B) Replace all capacitors by a short-circuit equivalent.
• C) Remove all elements bypassed by the short-circuit equivalent.
• D) All of the above

5. The _____ model suffers from being limited to a particular set of operating conditions if it is to be considered accurate.

• A) hybrid equivalent
• B) r_e
• C) β
• D) Thevenin

6. The _____ model fails to account for the output impedance level of the device and the feedback effect from output to input.

• A) hybrid equivalent
• B) r_e
• C) β
• D) Thevenin

7. Which of the following is (are) true regarding the input impedance for frequencies in the midrange ≤ 100 kHz of a BJT transistor amplifier?

• A) The input impedance is purely resistive.
• B) It varies from a few ohms to mega ohms.
• C) An ohmmeter cannot be used to measure the small-signal ac input impedance.
• D) All of the above

8. Which of the following is (are) true regarding the output impedance for frequencies in the midrange ≤ 100 kHz of a BJT transistor amplifier?

• A) The output impedance is purely resistive.
• B) It varies from a few ohms to more than 2 MΩ.
• C) An ohmmeter cannot be used to measure the small-signal ac output impedance.
• D) All of the above

9. What is the range of the current gain for BJT transistor amplifiers?

• A) less than 1
• B) 1 to 100
• C) above 100
• D) All of the above

10. The input impedance of a BJT amplifier is purely _____ in nature and can vary from a few _____ to _____.

• A) resistive, ohms, megohms
• B) capacitive, microfarads, farads
• C) inductive, millihenrys, henrys
• D) None of the above

11. For BJT amplifiers, the _____ gain typically ranges from a level just less than 1 to a level that may exceed 1000.

• A) voltage
• B) current
• C) impedance
• D) All of the above

12. What is the unit of the parameter h_o?

• A) Volt
• B) Ohm
• C) Siemen
• D) No unit

13. Which of the h-parameters corresponds to r_e in a common-base configuration?

• A) h_ib
• B) h_fb
• C) h_rb
• D) h_ob

14. What is the range of the input impedance of a common-base configuration?

• A) A few ohms to a maximum of 50 Ω
• B) 1 kΩ to 5 kΩ
• C) 100 kΩ to 500 kΩ
• D) 1 MΩ to 2 MΩ

15. What is the typical value of the current gain of a common-base configuration?

• A) Less than 1
• B) Between 1 and 50
• C) Between 100 and 200
• D) Undefined

16. What is the controlling current in a common-base configuration?

• A) I_e
• B) I_c
• C) I_b
• D) None of the above

17. What is the typical range of the output impedance of a common-emitter configuration?

• A) 10 Ω to 100 Ω
• B) 1 kΩ to 5 kΩ
• C) 40 kΩ to 50 kΩ
• D) 500 kΩ to 1 MΩ

18. Under which of the following conditions is the output impedance of the network approximately equal to R_C for a common-emitter fixed-bias configuration?

• A) r_o ≥ 10R_C
• B) r_o < 10R_C
• C) r_o < r_o
• D) r_o > r_o

19. Under which of the following condition(s) is the current gain Av ≈ β?

• A) r_o ≥ 10RC
• B) R_B ≥ 10r_e
• C) r_o ≥ 10R_C and R_B ≥ 10r_e
• D) None of the above

20. What does the negative sign in the voltage gain of the common-emitter fixed-bias configuration indicate?

• A) The output and input voltages are 180º out of phase.
• B) Gain is smaller than 1.
• C) Gain is larger than 1.
• D) None of the above

21. For the common-emitter fixed-bias configuration, there is a _____ phase shift between the input and output signals.

• A) 0º
• B) 45º
• C) 90º
• D) 180º

22. Which of the following configurations has an output impedance Z_o equal to R_C?

• A) Fixed-bias common-emitter
• B) Common-emitter voltage-divider with bypass capacitor
• C) Common-emitter voltage-divider without bypass capacitor
• D) All of the above

23. Which of the following configurations has a voltage gain of –R_C /r_e?

• A) Fixed-bias common-emitter
• B) Common-emitter voltage-divider with bypass capacitor
• C) Fixed-bias common-emitter and voltage-divider with bypass capacitor
• D) Common-emitter voltage-divider without bypass capacitor

24. Which of the following configurations has the lowest output impedance?

• A) Fixed-bias
• B) Voltage-divider
• C) Emitter-follower
• D) None of the above

25. The _____ configuration is frequently used for impedance matching.

• A) fixed-bias
• B) voltage-divider bias
• C) emitter-follower
• D) collector feedback

26. The emitter-follower configuration has a _____ impedance at the input and a _____ impedance at the output.

• A) low, low
• B) low, high
• C) high, low
• D) high, high

27. Which of the following gains is less than 1 for a common-base configuration?

• A) A_i
• B) A_v
• C) A_p
• D) None of the above

28. Which of the following conditions must be met to allow the use of the approximate approach in a voltage-divider bias configuration?

• A) βr_e > 10R₂
• B) βR_E > 10R2
• C) βR_E < 10R₂
• D) βr_e < 10R₂

29. Which one of the following configurations has the lowest input impedance?

• A) Fixed-bias
• B) Common-base
• C) Emitter-follower
• D) Voltage-divider?

30. For the collector dc feedback configuration, there is a _____ phase shift between the input and output signals.

• A) 0º
• B) 45º
• C) 90º
• D) 180º

31. Which of the following represent(s) the advantage(s) of the system approach over the r-model approach?

• A) Thevenin's theorem can be used.
• B) The effect of changing the load can be determined by a simple equation.
• C) There is no need to go back to the ac equivalent model and analyze the entire network.
• D) All of the above

32. The loaded voltage gain of an amplifier is always more than the no-load level.

• A) True
• B) False

33. The smaller the level of R_L, the larger the level of ac voltage gain.

• A) True
• B) False

34. Which of the following is (are) true to achieve a good overall voltage gain for the circuit?

• A) The effect of R_s and R_L must be considered as a product.
• B) The effect of R_s and R_L must be considered as a product and evaluated individually.
• C) The effect of R_s and R_L must be evaluated individually.
• D) None of the above

35. The _____ the source resistance and/or _____ the load resistance, the less the overall gain of an amplifier.

• A) smaller, smaller
• B) smaller, larger
• C) larger, smaller
• D) larger, larger

36. The current gain for the Darlington connection is _____.

• A) β₁ • (β₂/2)
• B) β₁ • β₂
• C) β₁ / β₂
• D) β1 • (β₂ – 1)

37. What is the voltage gain of a feedback pair connection?

• A) 1
• B) –1
• C) 100
• D) –100

38. Which of the following is referred to as the reverse transfer voltage ratio?

• A) h_i
• B) h_r
• C) h_f
• D) h_o

39. In an unbypassed emitter bias configuration h_ie replaces _____ in the r_e model.

• A) r_e
• B) β
• C) βr_e
• D) I_b

Fill-in-the-blanks Questions

1. The _____ of the input signal is one of the first concerns in the sinusoidal ac analysis of transistor networks.

• A) period
• B) frequency
• C) magnitude
• D) None of the above

2. The _____ model(s) is (are) commonly used in the small-signal ac analysis of transistor networks.

• A) r_e
• B) hybrid equivalent
• C) r_e and hybrid equivalent
• D) None of the above

3. The peak value of the ac input signal is controlled by the _____ in a transistor network for the frequencies in the low to midrange.

• A) resistors
• B) applied dc voltage
• C) capacitors
• D) None of the above

4. _____ can be applied to determine the response of the ac equivalent circuit.

• A) Mesh analysis
• B) Node analysis
• C) Thevenin's theorem
• D) All of the above

5. For transistor amplifiers, the no-load voltage gain is _____ the loaded voltage gain.

• A) smaller than
• B) greater than
• C) the same as
• D) None of the above

6. The input and output signals are _____ for the typical transistor amplifier at frequencies that permit ignoring the effects of the reactive elements.

• A) in phase
• B) 180º out of phase
• C) either in phase or 180º out of phase
• D) None of the above

7. One junction of an operating transistor is _____ and the other one is _____.

• A) forward-biased, forward-biased
• B) forward-biased, reverse-biased
• C) reverse-biased, reverse-biased
• D) None of the above

8. For a common-base configuration, the input impedance is relatively _____ and the output impedance quite _____.

• A) high, small
• B) small, high
• C) small, small
• D) high, high

9. The output voltage and the input voltage are _____ for the common-base configuration.

• A) 45º out of phase
• B) 90º out of phase
• C) 180º out of phase
• D) in phase

10. In a common-emitter configuration _____ is the controlling current while _____ is the controlled current.

• A) I_C, I_B
• B) I_C, I_E
• C) I_B, I_C
• D) None of the above

11. The level of re is determined by _____.

• A) α
• B) I_E
• C) β
• D) I_B

12. The output voltage and the input voltage are _____ for the common-emitter configuration.

• A) in phase
• B) 45º out of phase
• C) 90º out of phase
• D) 180º out of phase

13. The common-emitter configuration has a _____ level of input impedance with a _____ voltage and current gain.

• A) moderate, high
• B) low, moderate
• C) low, low
• D) high, low

14. _____ refers to the forward transfer current ratio.

• A) h_i
• B) h_r
• C) h_f
• D) h_o

15. For the common-emitter and common-base configurations, the magnitude of _____ and _____ is often not included in the model.

• A) h_r, h_o
• B) h_i, h_e
• C) h_i, h_r
• D) h_e, h_o

16. In a fixed-bias network, the input signal V_i is applied to the _____ of the transistor while the output V_o is off the _____.

• A) base, collector
• B) base, emitter
• C) emitter, collector
• D) None of the above

17. In a voltage-divider bias configuration, the voltage-divider equation is used to determine the _____.

• A) ac level of V_b
• B) dc level of I_B
• C) dc level of V_B
• D) ac level of I_b

18. In a voltage-divider bias configuration, there can be a measurable difference in the results for _____ if the condition r_o ≥ 10R_C is not satisfied.

• A) Z_o
• B) A_v
• C) A_i
• D) All of the above

19. The bypass capacitor in a common-emitter configuration _____ the voltage gain.

• A) significantly decreases
• B) significantly increases
• C) slightly increases
• D) slightly decreases

20. In an emitter-follower, the voltage gain is _____.

• A) slightly less than 1
• B) slightly more than 1
• C) a very large value
• D) None of the above

21. In an emitter-follower, the output voltage is _____ with the input voltage.

• A) 45º out of phase
• B) 90º out of phase
• C) 180º out of phase
• D) in phase

22. An emitter-follower has _____ impedance at the input and _____ impedance at the output.

• A) high, high
• B) low, high
• C) high, low
• D) low, low

23. _____ is slightly affected if the condition r_o ≥ 10R_E is not satisfied in the analysis of an emitter-follower configuration.

• A) Z_i
• B) Z_o
• C) A_v
• D) A_i

24. A common-base configuration has _____ impedance at the input and _____ impedance at the output.

• A) high, high
• B) high, low
• C) low, low
• D) low, high

25. In a common-base configuration, the input and output voltages are _____ and the output and input currents are _____.

• A) 180º out of phase, 180º out of phase
• B) 180º out of phase, in phase
• C) in phase,180º out of phase
• D) in phase, in phase

26. Ideally, the changes in the load resistor or the source resistor should have _____ effect on all the parameters of the two-port model.

• A) a great
• B) a moderate
• C) no
• D) None of the above

27. The loaded voltage gain of an amplifier is _____ the no-load level.

• A) always more than
• B) always less than
• C) always the same as
• D) None of the above

28. The coupling capacitor places the load and collector resistors in a _____ arrangement.

• A) series
• B) parallel
• C) series-parallel
• D) None of the above

29. The dc load line and ac load line both have the same _____ .

• A) x-intercept
• B) y-intercept
• C) slope
• D) Q-point

30. The _____ the level of R_L, the _____ the level of ac voltage gain.

• A) smaller, higher
• B) larger, lower
• C) smaller, lower
• D) None of the above

31. The _____ the source resistance, the _____ the overall gain of an amplifier.

• A) larger, higher
• B) larger, lower
• C) lower, lower
• D) None of the above

32. The ac voltage gain of a Darlington connection is about _____.

• A) 0
• B) 1
• C) β_D
• D) None of the above

33. The feedback pair uses a(n) _____ transistor driving a(n) _____ transistor, the two devices acting effectively much like one pnp transistor.

• A) pnp, npn
• B) pnp, pnp
• C) npn, npn
• D) None of the above

34. In an unbypassed emitter-bias configuration _____ replaces r_e in the hybrid equivalent circuit.

• A) h_ie
• B) h_fe
• C) h_re
• D) h_oe

35. In a hybrid equivalent circuit, ______ is determined to make it easier to find the other parameters.

• A) Z_i
• B) Z_o
• C) A_i
• D) A_v

 

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• Electronic Devices and Circuit Theory (Chapter Quiz)

Note: Check your works. Semiconductor Diodes - MCQs Answers

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